PATH:
lib64
/
llvm17
/
lib
/
clang
/
17
/
include
/*===--------------- avxvnniintrin.h - VNNI intrinsics --------------------=== * * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. * *===-----------------------------------------------------------------------=== */ #ifndef __IMMINTRIN_H #error "Never use <avxvnniintrin.h> directly; include <immintrin.h> instead." #endif #ifndef __AVXVNNIINTRIN_H #define __AVXVNNIINTRIN_H /* Below intrinsics defined in avx512vlvnniintrin.h can be used for AVXVNNI */ /// \fn __m256i _mm256_dpbusd_epi32(__m256i __S, __m256i __A, __m256i __B) /// \fn __m256i _mm256_dpbusds_epi32(__m256i __S, __m256i __A, __m256i __B) /// \fn __m256i _mm256_dpwssd_epi32(__m256i __S, __m256i __A, __m256i __B) /// \fn __m256i _mm256_dpwssds_epi32(__m256i __S, __m256i __A, __m256i __B) /// \fn __m128i _mm_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B) /// \fn __m128i _mm_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B) /// \fn __m128i _mm_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B) /// \fn __m128i _mm_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B) /* Intrinsics with _avx_ prefix are for compatibility with msvc. */ /* Define the default attributes for the functions in this file. */ #define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(256))) #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(128))) /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed /// 16-bit results. Sum these 4 results with the corresponding 32-bit integer /// in \a __S, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) /// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) /// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:256] := 0 /// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v8si)__A, (__v8si)__B); } /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed /// 16-bit results. Sum these 4 results with the corresponding 32-bit integer /// in \a __S using signed saturation, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) /// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) /// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:256] := 0 /// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v8si)__A, (__v8si)__B); } /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with /// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit /// results. Sum these 2 results with the corresponding 32-bit integer in \a __S, /// and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:256] := 0 /// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v8si)__A, (__v8si)__B); } /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with /// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit /// results. Sum these 2 results with the corresponding 32-bit integer in \a __S /// using signed saturation, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:256] := 0 /// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v8si)__A, (__v8si)__B); } /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed /// 16-bit results. Sum these 4 results with the corresponding 32-bit integer /// in \a __S, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) /// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) /// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:128] := 0 /// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v4si)__A, (__v4si)__B); } /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed /// 16-bit results. Sum these 4 results with the corresponding 32-bit integer /// in \a __S using signed saturation, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) /// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])) /// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:128] := 0 /// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v4si)__A, (__v4si)__B); } /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with /// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit /// results. Sum these 2 results with the corresponding 32-bit integer in \a __S, /// and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:128] := 0 /// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v4si)__A, (__v4si)__B); } /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with /// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit /// results. Sum these 2 results with the corresponding 32-bit integer in \a __S /// using signed saturation, and store the packed 32-bit results in DST. /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// /// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:128] := 0 /// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v4si)__A, (__v4si)__B); } #undef __DEFAULT_FN_ATTRS128 #undef __DEFAULT_FN_ATTRS256 #endif // __AVXVNNIINTRIN_H
[+]
..
[-] riscv_ntlh.h
[edit]
[-] avx512vlbitalgintrin.h
[edit]
[-] avxifmaintrin.h
[edit]
[-] mm_malloc.h
[edit]
[-] avx512vlbf16intrin.h
[edit]
[-] mwaitxintrin.h
[edit]
[-] adxintrin.h
[edit]
[-] arm_cmse.h
[edit]
[-] __clang_cuda_intrinsics.h
[edit]
[-] module.modulemap
[edit]
[-] crc32intrin.h
[edit]
[+]
cuda_wrappers
[-] msa.h
[edit]
[-] __clang_hip_stdlib.h
[edit]
[-] arm_acle.h
[edit]
[-] arm_neon_sve_bridge.h
[edit]
[-] xsaveintrin.h
[edit]
[-] velintrin_gen.h
[edit]
[-] stdatomic.h
[edit]
[-] hvx_hexagon_protos.h
[edit]
[-] uintrintrin.h
[edit]
[-] fxsrintrin.h
[edit]
[-] sha512intrin.h
[edit]
[-] __clang_cuda_texture_intrinsics.h
[edit]
[-] iso646.h
[edit]
[-] unwind.h
[edit]
[-] avx512vlbwintrin.h
[edit]
[-] avxvnniint8intrin.h
[edit]
[-] avx512erintrin.h
[edit]
[-] avxvnniintrin.h
[edit]
[-] ia32intrin.h
[edit]
[-] rdseedintrin.h
[edit]
[-] prfchiintrin.h
[edit]
[-] amxcomplexintrin.h
[edit]
[-] clflushoptintrin.h
[edit]
[-] htmxlintrin.h
[edit]
[-] avx512fintrin.h
[edit]
[-] gfniintrin.h
[edit]
[-] arm_cde.h
[edit]
[+]
ppc_wrappers
[-] amxfp16intrin.h
[edit]
[-] velintrin_approx.h
[edit]
[-] avx512pfintrin.h
[edit]
[-] stdarg.h
[edit]
[-] cmpccxaddintrin.h
[edit]
[-] avx512vlintrin.h
[edit]
[-] __clang_hip_math.h
[edit]
[-] vecintrin.h
[edit]
[-] xtestintrin.h
[edit]
[-] __wmmintrin_aes.h
[edit]
[-] arm_neon.h
[edit]
[-] immintrin.h
[edit]
[-] ammintrin.h
[edit]
[-] waitpkgintrin.h
[edit]
[-] vpclmulqdqintrin.h
[edit]
[-] fmaintrin.h
[edit]
[-] tsxldtrkintrin.h
[edit]
[-] prfchwintrin.h
[edit]
[-] avx512bitalgintrin.h
[edit]
[-] bmiintrin.h
[edit]
[-] __wmmintrin_pclmul.h
[edit]
[-] htmintrin.h
[edit]
[-] mm3dnow.h
[edit]
[-] __clang_cuda_builtin_vars.h
[edit]
[-] __clang_hip_runtime_wrapper.h
[edit]
[-] stdbool.h
[edit]
[-] altivec.h
[edit]
[-] wbnoinvdintrin.h
[edit]
[-] keylockerintrin.h
[edit]
[-] tgmath.h
[edit]
[-] hexagon_circ_brev_intrinsics.h
[edit]
[-] x86intrin.h
[edit]
[-] pkuintrin.h
[edit]
[-] avx512vbmivlintrin.h
[edit]
[-] avxneconvertintrin.h
[edit]
[-] __clang_hip_cmath.h
[edit]
[-] sgxintrin.h
[edit]
[-] f16cintrin.h
[edit]
[-] opencl-c-base.h
[edit]
[-] cpuid.h
[edit]
[-] raointintrin.h
[edit]
[-] builtins.h
[edit]
[-] emmintrin.h
[edit]
[-] smmintrin.h
[edit]
[-] vaesintrin.h
[edit]
[-] larchintrin.h
[edit]
[-] avx512ifmaintrin.h
[edit]
[-] intrin.h
[edit]
[-] avx512vlvp2intersectintrin.h
[edit]
[-] fma4intrin.h
[edit]
[-] pmmintrin.h
[edit]
[-] __clang_hip_libdevice_declares.h
[edit]
[-] limits.h
[edit]
[-] clwbintrin.h
[edit]
[-] rtmintrin.h
[edit]
[-] mmintrin.h
[edit]
[-] stddef.h
[edit]
[-] invpcidintrin.h
[edit]
[-] avx512vp2intersectintrin.h
[edit]
[-] cet.h
[edit]
[-] xopintrin.h
[edit]
[-] avx512vlvnniintrin.h
[edit]
[-] avx512vlfp16intrin.h
[edit]
[-] stdint.h
[edit]
[-] arm64intr.h
[edit]
[-] sm4intrin.h
[edit]
[-] avx512vnniintrin.h
[edit]
[-] avx2intrin.h
[edit]
[-] movdirintrin.h
[edit]
[-] tbmintrin.h
[edit]
[-] arm_mve.h
[edit]
[-] avx512ifmavlintrin.h
[edit]
[-] amxintrin.h
[edit]
[-] opencl-c.h
[edit]
[-] stdalign.h
[edit]
[-] __clang_cuda_device_functions.h
[edit]
[-] pconfigintrin.h
[edit]
[-] avx512fp16intrin.h
[edit]
[-] inttypes.h
[edit]
[-] arm_bf16.h
[edit]
[-] __clang_cuda_math_forward_declares.h
[edit]
[-] vadefs.h
[edit]
[-] shaintrin.h
[edit]
[-] hexagon_protos.h
[edit]
[-] ptwriteintrin.h
[edit]
[-] xsaveoptintrin.h
[edit]
[-] enqcmdintrin.h
[edit]
[-] x86gprintrin.h
[edit]
[-] tmmintrin.h
[edit]
[-] stdnoreturn.h
[edit]
[-] avx512bf16intrin.h
[edit]
[-] varargs.h
[edit]
[-] s390intrin.h
[edit]
[-] avx512vbmiintrin.h
[edit]
[+]
openmp_wrappers
[-] wmmintrin.h
[edit]
[-] __clang_cuda_cmath.h
[edit]
[-] clzerointrin.h
[edit]
[-] xsavesintrin.h
[edit]
[-] __clang_cuda_libdevice_declares.h
[edit]
[-] nmmintrin.h
[edit]
[-] wasm_simd128.h
[edit]
[-] xsavecintrin.h
[edit]
[-] avx512dqintrin.h
[edit]
[-] lwpintrin.h
[edit]
[-] serializeintrin.h
[edit]
[-] arm_sme_draft_spec_subject_to_change.h
[edit]
[-] avxintrin.h
[edit]
[-] __stddef_max_align_t.h
[edit]
[-] sm3intrin.h
[edit]
[-] velintrin.h
[edit]
[-] __clang_cuda_complex_builtins.h
[edit]
[-] armintr.h
[edit]
[-] avx512cdintrin.h
[edit]
[-] float.h
[edit]
[-] avx512vbmi2intrin.h
[edit]
[-] lzcntintrin.h
[edit]
[-] sifive_vector.h
[edit]
[-] rdpruintrin.h
[edit]
[-] arm_sve.h
[edit]
[-] avx512vpopcntdqintrin.h
[edit]
[-] xmmintrin.h
[edit]
[-] hresetintrin.h
[edit]
[-] bmi2intrin.h
[edit]
[-] hexagon_types.h
[edit]
[-] avx512bwintrin.h
[edit]
[-] cetintrin.h
[edit]
[-] __clang_cuda_math.h
[edit]
[-] avx512vlvbmi2intrin.h
[edit]
[-] arm_fp16.h
[edit]
[-] avx512vpopcntdqvlintrin.h
[edit]
[-] avxvnniint16intrin.h
[edit]
[+]
llvm_libc_wrappers
[-] __clang_cuda_runtime_wrapper.h
[edit]
[-] cldemoteintrin.h
[edit]
[-] avx512vldqintrin.h
[edit]
[-] avx512vlcdintrin.h
[edit]
[-] popcntintrin.h
[edit]