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/*===-------- avxvnniint8intrin.h - AVXVNNIINT8 intrinsics -----------===
 *
 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 * See https://llvm.org/LICENSE.txt for license information.
 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 *
 *===-----------------------------------------------------------------------===
 */
#ifndef __IMMINTRIN_H
#error                                                                         \
    "Never use <avxvnniint8intrin.h> directly; include <immintrin.h> instead."
#endif

#ifndef __AVXVNNIINT8INTRIN_H
#define __AVXVNNIINT8INTRIN_H

/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS256                                                  \
  __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"),    \
                 __min_vector_width__(256)))
#define __DEFAULT_FN_ATTRS128                                                  \
  __attribute__((__always_inline__, __nodebug__, __target__("avxvnniint8"),    \
                 __min_vector_width__(128)))

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding signed 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbssd_epi32(__m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 128-bit vector of [16 x char].
/// \param __B
///    A 128-bit vector of [16 x char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])
/// 	tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])
/// 	tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])
/// 	tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssd_epi32(__m128i __W,
                                                                 __m128i __A,
                                                                 __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbssd128((__v4si)__W, (__v4si)__A,
                                             (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding signed 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 256-bit vector of [32 x char].
/// \param __B
///    A 256-bit vector of [32 x char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])
/// 	tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])
/// 	tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])
/// 	tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbssd_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbssd256((__v8si)__W, (__v8si)__A,
                                             (__v8si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding signed 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 128-bit vector of [16 x char].
/// \param __B
///    A 128-bit vector of [16 x char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])
/// 	tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])
/// 	tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])
/// 	tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbssds_epi32(__m128i __W,
                                                                  __m128i __A,
                                                                  __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbssds128((__v4si)__W, (__v4si)__A,
                                              (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding signed 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 256-bit vector of [32 x char].
/// \param __B
///    A 256-bit vector of [32 x char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := SignExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])
/// 	tmp2.word := SignExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])
/// 	tmp3.word := SignExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2])
/// 	tmp4.word := SignExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbssds256((__v8si)__W, (__v8si)__A,
                                              (__v8si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 128-bit vector of [16 x char].
/// \param __B
///    A 128-bit vector of [16 x unsigned char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]))
/// 	tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]))
/// 	tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]))
/// 	tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]))
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsud_epi32(__m128i __W,
                                                                 __m128i __A,
                                                                 __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbsud128((__v4si)__W, (__v4si)__A,
                                             (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 256-bit vector of [32 x char].
/// \param __B
///    A 256-bit vector of [32 x unsigned char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]))
/// 	tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]))
/// 	tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]))
/// 	tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]))
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbsud256((__v8si)__W, (__v8si)__A,
                                             (__v8si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 128-bit vector of [16 x char].
/// \param __B
///    A 128-bit vector of [16 x unsigned char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]))
/// 	tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]))
/// 	tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]))
/// 	tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]))
/// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbsuds_epi32(__m128i __W,
                                                                  __m128i __A,
                                                                  __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbsuds128((__v4si)__W, (__v4si)__A,
                                              (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 256-bit vector of [32 x char].
/// \param __B
///    A 256-bit vector of [32 x unsigned char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := Signed(SignExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j]))
/// 	tmp2.word := Signed(SignExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1]))
/// 	tmp3.word := Signed(SignExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2]))
/// 	tmp4.word := Signed(SignExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3]))
/// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbsuds256((__v8si)__W, (__v8si)__A,
                                              (__v8si)__B);
}

/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 128-bit vector of [16 x unsigned char].
/// \param __B
///    A 128-bit vector of [16 x unsigned char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])
/// 	tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])
/// 	tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])
/// 	tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuud_epi32(__m128i __W,
                                                                 __m128i __A,
                                                                 __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbuud128((__v4si)__W, (__v4si)__A,
                                             (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBSSD instruction.
///
/// \param __A
///    A 256-bit vector of [32 x unsigned char].
/// \param __B
///    A 256-bit vector of [32 x unsigned char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])
/// 	tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])
/// 	tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])
/// 	tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbuud256((__v8si)__W, (__v8si)__A,
                                             (__v8si)__B);
}

/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm_dpbuuds_epi32( __m128i __W, __m128i __A, __m128i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBUUDS instruction.
///
/// \param __A
///    A 128-bit vector of [16 x unsigned char].
/// \param __B
///    A 128-bit vector of [16 x unsigned char].
/// \returns
///    A 128-bit vector of [4 x int].
///
/// \code{.operation}
/// FOR j := 0 to 3
/// 	tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])
/// 	tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])
/// 	tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])
/// 	tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:128] := 0
/// \endcode
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbuuds_epi32(__m128i __W,
                                                                  __m128i __A,
                                                                  __m128i __B) {
  return (__m128i)__builtin_ia32_vpdpbuuds128((__v4si)__W, (__v4si)__A,
                                              (__v4si)__B);
}

/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
///    corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
///    signed 16-bit results. Sum these 4 results with the corresponding
///    32-bit integer in \a __W with signed saturation, and store the packed
///    32-bit results in \a dst.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// _mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B);
/// \endcode
///
/// This intrinsic corresponds to the \c VPDPBUUDS instruction.
///
/// \param __A
///    A 256-bit vector of [32 x unsigned char].
/// \param __B
///    A 256-bit vector of [32 x unsigned char].
/// \returns
///    A 256-bit vector of [8 x int].
///
/// \code{.operation}
/// FOR j := 0 to 7
/// 	tmp1.word := ZeroExtend16(__A.byte[4*j]) * ZeroExtend16(__B.byte[4*j])
/// 	tmp2.word := ZeroExtend16(__A.byte[4*j+1]) * ZeroExtend16(__B.byte[4*j+1])
/// 	tmp3.word := ZeroExtend16(__A.byte[4*j+2]) * ZeroExtend16(__B.byte[4*j+2])
/// 	tmp4.word := ZeroExtend16(__A.byte[4*j+3]) * ZeroExtend16(__B.byte[4*j+3])
/// 	dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
/// ENDFOR
/// dst[MAX:256] := 0
/// \endcode
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_dpbuuds_epi32(__m256i __W, __m256i __A, __m256i __B) {
  return (__m256i)__builtin_ia32_vpdpbuuds256((__v8si)__W, (__v8si)__A,
                                              (__v8si)__B);
}
#undef __DEFAULT_FN_ATTRS128
#undef __DEFAULT_FN_ATTRS256

#endif // __AVXVNNIINT8INTRIN_H

[+] ..
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[-] avx512vlbitalgintrin.h [edit]
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[-] mm_malloc.h [edit]
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[-] __clang_cuda_intrinsics.h [edit]
[-] module.modulemap [edit]
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[+] cuda_wrappers
[-] msa.h [edit]
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[-] arm_acle.h [edit]
[-] arm_neon_sve_bridge.h [edit]
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[-] stdatomic.h [edit]
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[-] uintrintrin.h [edit]
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[-] unwind.h [edit]
[-] avx512vlbwintrin.h [edit]
[-] avxvnniint8intrin.h [edit]
[-] avx512erintrin.h [edit]
[-] avxvnniintrin.h [edit]
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[-] cmpccxaddintrin.h [edit]
[-] avx512vlintrin.h [edit]
[-] __clang_hip_math.h [edit]
[-] vecintrin.h [edit]
[-] xtestintrin.h [edit]
[-] __wmmintrin_aes.h [edit]
[-] arm_neon.h [edit]
[-] immintrin.h [edit]
[-] ammintrin.h [edit]
[-] waitpkgintrin.h [edit]
[-] vpclmulqdqintrin.h [edit]
[-] fmaintrin.h [edit]
[-] tsxldtrkintrin.h [edit]
[-] prfchwintrin.h [edit]
[-] avx512bitalgintrin.h [edit]
[-] bmiintrin.h [edit]
[-] __wmmintrin_pclmul.h [edit]
[-] htmintrin.h [edit]
[-] mm3dnow.h [edit]
[-] __clang_cuda_builtin_vars.h [edit]
[-] __clang_hip_runtime_wrapper.h [edit]
[-] stdbool.h [edit]
[-] altivec.h [edit]
[-] wbnoinvdintrin.h [edit]
[-] keylockerintrin.h [edit]
[-] tgmath.h [edit]
[-] hexagon_circ_brev_intrinsics.h [edit]
[-] x86intrin.h [edit]
[-] pkuintrin.h [edit]
[-] avx512vbmivlintrin.h [edit]
[-] avxneconvertintrin.h [edit]
[-] __clang_hip_cmath.h [edit]
[-] sgxintrin.h [edit]
[-] f16cintrin.h [edit]
[-] opencl-c-base.h [edit]
[-] cpuid.h [edit]
[-] raointintrin.h [edit]
[-] builtins.h [edit]
[-] emmintrin.h [edit]
[-] smmintrin.h [edit]
[-] vaesintrin.h [edit]
[-] larchintrin.h [edit]
[-] avx512ifmaintrin.h [edit]
[-] intrin.h [edit]
[-] avx512vlvp2intersectintrin.h [edit]
[-] fma4intrin.h [edit]
[-] pmmintrin.h [edit]
[-] __clang_hip_libdevice_declares.h [edit]
[-] limits.h [edit]
[-] clwbintrin.h [edit]
[-] rtmintrin.h [edit]
[-] mmintrin.h [edit]
[-] stddef.h [edit]
[-] invpcidintrin.h [edit]
[-] avx512vp2intersectintrin.h [edit]
[-] cet.h [edit]
[-] xopintrin.h [edit]
[-] avx512vlvnniintrin.h [edit]
[-] avx512vlfp16intrin.h [edit]
[-] stdint.h [edit]
[-] arm64intr.h [edit]
[-] sm4intrin.h [edit]
[-] avx512vnniintrin.h [edit]
[-] avx2intrin.h [edit]
[-] movdirintrin.h [edit]
[-] tbmintrin.h [edit]
[-] arm_mve.h [edit]
[-] avx512ifmavlintrin.h [edit]
[-] amxintrin.h [edit]
[-] opencl-c.h [edit]
[-] stdalign.h [edit]
[-] __clang_cuda_device_functions.h [edit]
[-] pconfigintrin.h [edit]
[-] avx512fp16intrin.h [edit]
[-] inttypes.h [edit]
[-] arm_bf16.h [edit]
[-] __clang_cuda_math_forward_declares.h [edit]
[-] vadefs.h [edit]
[-] shaintrin.h [edit]
[-] hexagon_protos.h [edit]
[-] ptwriteintrin.h [edit]
[-] xsaveoptintrin.h [edit]
[-] enqcmdintrin.h [edit]
[-] x86gprintrin.h [edit]
[-] tmmintrin.h [edit]
[-] stdnoreturn.h [edit]
[-] avx512bf16intrin.h [edit]
[-] varargs.h [edit]
[-] s390intrin.h [edit]
[-] avx512vbmiintrin.h [edit]
[+] openmp_wrappers
[-] wmmintrin.h [edit]
[-] __clang_cuda_cmath.h [edit]
[-] clzerointrin.h [edit]
[-] xsavesintrin.h [edit]
[-] __clang_cuda_libdevice_declares.h [edit]
[-] nmmintrin.h [edit]
[-] wasm_simd128.h [edit]
[-] xsavecintrin.h [edit]
[-] avx512dqintrin.h [edit]
[-] lwpintrin.h [edit]
[-] serializeintrin.h [edit]
[-] arm_sme_draft_spec_subject_to_change.h [edit]
[-] avxintrin.h [edit]
[-] __stddef_max_align_t.h [edit]
[-] sm3intrin.h [edit]
[-] velintrin.h [edit]
[-] __clang_cuda_complex_builtins.h [edit]
[-] armintr.h [edit]
[-] avx512cdintrin.h [edit]
[-] float.h [edit]
[-] avx512vbmi2intrin.h [edit]
[-] lzcntintrin.h [edit]
[-] sifive_vector.h [edit]
[-] rdpruintrin.h [edit]
[-] arm_sve.h [edit]
[-] avx512vpopcntdqintrin.h [edit]
[-] xmmintrin.h [edit]
[-] hresetintrin.h [edit]
[-] bmi2intrin.h [edit]
[-] hexagon_types.h [edit]
[-] avx512bwintrin.h [edit]
[-] cetintrin.h [edit]
[-] __clang_cuda_math.h [edit]
[-] avx512vlvbmi2intrin.h [edit]
[-] arm_fp16.h [edit]
[-] avx512vpopcntdqvlintrin.h [edit]
[-] avxvnniint16intrin.h [edit]
[+] llvm_libc_wrappers
[-] __clang_cuda_runtime_wrapper.h [edit]
[-] cldemoteintrin.h [edit]
[-] avx512vldqintrin.h [edit]
[-] avx512vlcdintrin.h [edit]
[-] popcntintrin.h [edit]